1. Field of the Invention
The present invention relates to semiconductor package, and more particularly, to a ball grid array (hereinafter, "BGA") semiconductor package and method of fabricating the same.
2. Description of the Related Art
A quad flat package (hereinafter, "QFP") has received great attention as part of a multipin trend in the semiconductor packaging technology. The width of outer leads becomes narrower and the pitch between the leads become minute in the QFP. The leads are, however, easily bent and the package is hard to align on a printed circuit board (PCB) when the leads are surface-mounted on the PCB. Moreover, it is difficult to control the amount of solder in the manufacturing process.
Accordingly, a BGA semiconductor package has been developed to solve the problems of the QFP. The BGA semiconductor package has solder balls instead of the outer leads, so that the disadvantages of the QFP can be overcome.
FIG. 1 is a longitudinal cross-sectional view showing a conventional BGA semiconductor package. The conventional BGA semiconductor package includes a substrate 1 having a plurality of inner leads (not illustrated) in a form of miniature wirings, a semiconductor chip 2 attached on the upper surface of the substrate 1 using an adhesive 3, a plurality of conductive wires 4 electrically connecting the semiconductor chip 2 and each one end of the inner leads disposed in the substrate, a molding unit 5 sealing a predetermined region of the upper surface of the substrate 1 with an epoxy molding compound to encapsulate the semiconductor chip 2 and the wires 4, and a plurality of solder balls 6 formed on the lower surface of the substrate 1 and connected with the other end of each inner lead in the substrate 1.
However, the conventional BGA semiconductor package employs the substrate 1 having the inner leads disposed therein, and the substrate 1 will already have absorbed moisture during the fabricating process of conductive layers and an insulating layers through an etching process. Accordingly, delamination and cracking caused by vapor pressure inside the substrate reduce the reliability of the semiconductor package. Further, since the epoxy molding unit 5 is formed only on the upper surface of the substrate 1, delamination occurs easily at the boundary surface of the substrate 1 and the molding unit 5.